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Difference between revisions of "AVR serial communications"

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;Receiving data (synchronously): Can be performed by waiting until RXC in '''UCSRA''' has been set and then reading the '''UDR''' register. Reading from UDR will clear RXC.
 
;Receiving data (synchronously): Can be performed by waiting until RXC in '''UCSRA''' has been set and then reading the '''UDR''' register. Reading from UDR will clear RXC.
 
;Sending data: can be performed by first checking bit UDRE in '''UCSRA''' and then writing to '''UDR'''.
 
;Sending data: can be performed by first checking bit UDRE in '''UCSRA''' and then writing to '''UDR'''.
 +
;Interrupt driven reception: This can be achieved by implementing the ISR for USART (''USART_RXC_vect''), enabling the RXC interrupt by setting RXCIE in '''USCRB''' and allowing interrupts globally, by using the '''''sei()'''''-macro.

Revision as of 01:01, 3 December 2009

Notes on getting serial communications to work on AVR.

Registers

Enabling USART functions
Set RXEN and TXEN in UCSRB (USART Control and Status Register B) to enable serial reception.
Setting the baudrate
UBRR (USART Baud Rate Register) Sets the baud rate. The baud rate is fosc/(UBBR+1) divided by 2 (?), 8 (U2X = 1) or 16 (U2X = 0). U2X is located in UCSRA. UBRR is divided into two 8-bit registers (UBRRH, UBRRL).
Choosing the frame format
UCSZ0 - UCSZ1 (in UCSRC), and UCSZ2 (in UCSRB) can be used to set the number of databits (USART Character Size: 5, 6, 7, 8, reserved, reserved, reserved,9) . UPM0 - UPM1 (USART Parity mode: none, reserved, even, odd) and USBS (USART Stop Bit Select: one bit, two bit) are in UCSRC. Default is 8n1. Note: on atmega16, al writes to UCSRC must have bit URSEL set, otherwise the write will redirect to the UBRRH register.
Receiving data (synchronously)
Can be performed by waiting until RXC in UCSRA has been set and then reading the UDR register. Reading from UDR will clear RXC.
Sending data
can be performed by first checking bit UDRE in UCSRA and then writing to UDR.
Interrupt driven reception
This can be achieved by implementing the ISR for USART (USART_RXC_vect), enabling the RXC interrupt by setting RXCIE in USCRB and allowing interrupts globally, by using the sei()-macro.